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Serial Input PLL Frequency Synthesizer

16-PIN DIL Packages

16-PIN DIL
CircuitFrequency rangeDual modular prescalerSwallow counterN-CounterR-CounterVoltage range
MB15011100MHz64/65 or 128/1290 to 12716 to 20478 to 163832,7 to 5,5
MB15021100MHz64/65 or 128/1290 to 12716 to 20478 to 163835,0
MB15031100MHz128/1290 to 12716 to 204716 to 163835,0
MB1504520MHz32/33 or 64/650 to 12716 to 20478 to 163832,7 to 5,5
MB1505600MHz32/33 or 64/650 to 6316 to 20478 to 163835,0
MB87014A180MHz640 to 635 to 10235 to 655354,5 to 5,5
MB87086AWINTransceiverWINTransceiverWINTransceiverWINTransceiverWINTransceiverWINTransceiver
MC145157180MHzWINTransceiverWINTransceiver3 to 163833 to 163833,0 to 9,0
MC145158180MHz0 to 127WINTransceiver3 to 10233 to 163833,0 to 9,0
PLL2001250MHzWINTransceiverWINTransceiver272 to 655355 to 655352,7 to 5,5
PLL2002A250MHzWINTransceiverWINTransceiverWINTransceiverWINTransceiverWINTransceiver
SM5158A200MHzWINTransceiverWINTransceiver1056 to 655355 to 655352,7 to 5,5
PLL Block Diagram
PinNameI/ODescription
1OSCINIThe connection terminal of the crystal oscillator and the capaitors
It is possible to input a clock from outside, too, from OSCIN.
2OSCOUTO
3WINTransceiver-See the PLL-Sircuit spesification
4VDD-The power supply terminal
5DOPOThe lowpass filter connection terminal (For the passive Loop Filter)
6VSS-The grounding terminal
7LDOThe output terminal of the phase comparator.
When locking it outputs HIGH, and when unlocking it outputs LOW.
8fINIThe comparison frequency input terminal.
9ClockIThe clock input terminal of the data which sets a dividing ratio.
It reads data in the rise of the clock pulse.
10DataIThe input terminal of the data which sets a dividing ratio.
11LEIThe load enable input terminal. It sends the contents of Data to the side of the reference or the side of the comparison in the combination with the control bit of Data at the time of LE=H.
12DOAOThe connection terminal of the lowpass filter (For the active Loop Filter)
13WINTransceiver-See the PLL-Sircuit spesification
14WINTransceiver-See the PLL-Sircuit spesification
15fVOThe lowpass filter connection terminal (For the differential-type filter)
16fRO



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