This section explains the technical theory of operation for the RCI-2950 DX mobile
5.1 PLL CIRCUIT
The Phase Lock Loop (PLL) circuit is responsible for developing the receivers first local oscillator
signal and the transmitters exciter signal. The PLL circuit consists primarily of IC2, IC3, Q29, Q32,
Q33, Q34, Q36, Q37, Q38 and L16. The PLL circuit is programmed by the rotary channel switch GPS-0688.
The switch allows IC (U601) on CPU P.C.B to communicate the correct binary data information
to the programmable divider inside of IC2. IC2 then controls the VCO (Voltage Controlled Oscillator) to
oscillate on the correct frequency. This signal is fed either into the receivers first mixer (for receive
operation) or the transmitters mixer (for transmit operation).
5.2 RECEIVER CIRCUIT
The incoming receives signal come into the radio via the antenna and into the front-end pre-amp
consisting of Q19. The RF signal is fed into the mixer circuit of the Q20 and Q21. The signal is then
filtered by L8, L9 and L10 then into the AM/FM IF section of the receiver (depending on the mode of
operation). The signal is then detected by either the AM detector FM detector and then fed to the audio
amplifier section of the receiver and finally out to the speaker.
5.3 TRANSMITTER MODULATION CIRCUIT
(1) The transmitter modulation circuit modulates the low-level RF signal from the PLL exciter circuit
with the users audio voice signal from the microphone. The audio from the microphone is then
amplified and fed into the balanced modulator circuit.
(2) If the transceiver is in the AM mode, the AF power amplifier modulates the last RF amplifier which
produces a true amplitude modulated RF signal.
(3) If the transceiver is in the FM mode, the audio signal is not mixed with 10.6975MHz oscillator but
instead phase modulates the basic exciter signal from the PLL circuit in the TX mixer.
(4) If the transceiver is in the SSB mode, the audio signal is mixed with 10.6975MHz oscillator in IC5.